Brendan Gregg

MARCH 16, 2024

Only in extreme circumstances does the cost (in processor time and I-cache footprint) translate to a tangible benefit - circumstances which usually resort to hand-coded assembly anyway. It shouldn't be 10%, unless it's cache effects. And for leaf routines (which never establish a frame), this is a non-issue.

Java 137

Java Cache Google Hardware 137

Percona

JUNE 22, 2023

Defining high availability In general terms, high availability refers to the continuous operation of a system with little to no interruption to end users in the event of hardware or software failures, power outages, or other disruptions. Redundancy is also critical for disaster recovery.

Availability 133

Availability Database Open Source Hardware 133

Highly Scalable

AUGUST 20, 2013

At Grid Dynamics, we recently faced a necessity to build an in-stream data processing system that aimed to crunch about 8 billion events daily providing fault-tolerance and strict transactioanlity i.e. none of these events can be lost or duplicated. The signature is initially initialized by the event ID. Lineage Tracking.

Big Data 154

Big Data Processing Lambda Database 154

The Morning Paper

JUNE 25, 2019

This paper is all about the design of efficient data structures for far-memory, which turns out to have consequences reaching all the way down to the hardware. A far memory data structure has: far data in far memory, containing the core content of the data structure data caches at clients algorithms for operations. Refreshable vectors.

Design 80

Design Cache Hardware Scalability 80

John McCalpin

SEPTEMBER 17, 2018

Most Intel microprocessors support “HyperThreading” (Intel’s trademark for their implementation of “simultaneous multithreading”) — which allows the hardware to support (typically) two “Logical Processors” for each physical core. leaving half of the Logical Processors idle).

Hardware 40

Hardware Performance Cache Availability 40

John McCalpin

SEPTEMBER 17, 2018

Most Intel microprocessors support “HyperThreading” (Intel’s trademark for their implementation of “simultaneous multithreading”) — which allows the hardware to support (typically) two “Logical Processors” for each physical core. leaving half of the Logical Processors idle).

Hardware 40

Hardware Performance Cache Availability 40

Alex Russell

APRIL 29, 2021

Pointer Events. An extension to Service Workers that enables browsers to present users with cached content when offline. is access to hardware devices. This allows customisation and use of specialised features without custom, proprietary software for niche hardware. It was delayed by iOS for five years. Content Indexing.

Media 145

Media Games Education Engineering 145

Scalegrid

JANUARY 5, 2024

Data backup and recovery in a DBMS encompass a series of procedures that enable users to generate data backups as a precautionary measure and restore data in the event of data loss, corruption, or system failures. By implementing data abstraction techniques, these challenges can be addressed more effectively.

Efficiency 147

Efficiency Storage Database Scalability 147

John McCalpin

FEBRUARY 17, 2025

“Latency” is the duration from the execution of a load instruction (to an address that misses in all the caches), and the completion of that load instruction when the data is returned from memory. GB/s peak DRAM bandwidth, requiring 6 concurrent 64-byte cache line accesses to be pending at all times to maintain full bandwidth.

Latency 40

Latency Hardware Cache Systems 40

Sutter's Mill

FEBRUARY 13, 2017

I don’t get to Europe very often apart from ISO C++ standards meetings, but this spring I’ve been able to accept invitations for two English-language European events in the last week of April. If you’re interested in attending, please check out the links, and I look forward to meeting and re-meeting many of you there.

Latency 48

Latency C++ Hardware Performance 48

HammerDB

JUNE 27, 2022

It enables the user to measure database performance and make comparative judgements about database hardware and software. These factors meant that often when looking for database performance information, the results for a particular combination of software and hardware were not available. Cached vs Scaled Workloads.

Benchmarking 63

Benchmarking Open Source C++ Cache 63

Abhishek Tiwari

DECEMBER 27, 2017

Apache Arrow's in-memory columnar layout is specifically optimized for data locality for better performance on modern hardware like CPUs and GPUs. In contrast, Alluxio a middleware for data access - think Alluxio storage layer as fast cache. Event-driven data flow architecture. Leveraging the recent hardware advances.

Big Data 49

Big Data Artificial Intelligence Storage Hardware 49

Brendan Gregg

AUGUST 18, 2019

bpftrace is suited for this kind of analysis: decomposing metrics into distributions or per-event logs, and creating new metrics for visibility into blind spots. This example instrumented one of many thousands of available events. software Kernel software-based events. hardware Hardware counter-based instrumentation.

Latency 57

Latency C++ Cache Programming 57

SQL Server According to Bob

JANUARY 11, 2020

The modifications persist even in the event of a system failure. Stable media is commonly physical disk storage, but other devices and certain caching facilities qualify as well. Many high-end disk subsystems provide high-speed cache facilities to reduce the latency of read and write operations.

Servers 40

Servers Cache Media Hardware 40

The Morning Paper

MAY 14, 2019

When a QoS violation is predicted to occur and a culprit microservice located, Seer uses a lower level tracing infrastructure with hardware monitoring primitives to identify the reason behind the QoS violation. E.g., in memcached there are five main internal stages, each of which has a hardware or software queue associated with it.

Big Data 45

Big Data Cloud Performance Hardware 45

Randon ASCII

AUGUST 16, 2018

When a Windows program stops pumping messages there will be ETW events emitted to indicate exactly where this happened , so those types of hangs are trivial to find. The CFG memory block is best thought of a cache with bounded size. I loaded it into Windows Performance Analyzer (WPA), but I couldn’t definitively find the hang.

Programming 75

Programming Virtualization Code Processing 75

The Morning Paper

SEPTEMBER 19, 2019

Could it be Analyzing efficient stream processing on modern hardware ? On one of the themes that captures my imagination, how changing hardware platform influence system design: Rethinking database high availability with RDMA networks. What’s their secret??? What if the network was no longer the bottleneck?

Blockchain 46

Blockchain Hardware Google Speed 46

Alex Russell

OCTOBER 22, 2017

For this page to be done loading it needs to be responsive to user input — the “interactive” in “Time to Interactive” Browsers process user input by generating DOM events that application code listens to. This input processing happens on document’s main thread , where JavaScript runs.

Performance 74

Performance Network Benchmarking Mobile 74

ACM Sigarch

JULY 17, 2023

An example of a specification is the correct operation of the hardware of a microprocessor. An SDC is the worst possible outcome of a fault, as it can have an arbitrary impact on the correctness of software running on the hardware. Background A fault is a condition that causes the inability to meet a specification.

Energy 52

Energy Hardware Best Practices Architecture 52

SQL Performance

MARCH 8, 2021

If you need greater precision, use the query_thread_profile extended event, which reports in microseconds. The output from this event for the execution plan shown above is: This shows elapsed time for the join (node 2) is 701,465µs (truncated to 701ms in showplan). Total elapsed time is 933ms with 6,673ms of CPU time with a warm cache.

Servers 95

Servers Tuning Architecture Performance 95

The Netflix TechBlog

NOVEMBER 9, 2022

We turned to JVM-specific profiling, starting with the basic hotspot stats, and then switching to more detailed JFR (Java Flight Recorder) captures to compare the distribution of the events. We also see much higher L1 cache activity combined with 4x higher count of MACHINE_CLEARS. Cache line is a concept similar to memory page?—?

Hardware 363

Hardware Cache Performance Latency 363

SQL Server According to Bob

DECEMBER 18, 2018

Device level flushing may have an impact on your I/O caching, read ahead or other behaviors of the storage system. FILE_FLAG_NO_BUFFERING is the Win32, CreateFile API flags and attributes setting to bypass file system cache. FILE_FLAG_NO_BUFFERING is the Win32, CreateFile API flags and attributes setting to bypass file system cache.

Servers 90

Servers Media Cache Storage 90

The Morning Paper

MAY 12, 2019

An open-source benchmark suite for microservices and their hardware-software implications for cloud & edge systems Gan et al., The paper examines the implications of microservices at the hardware, OS and networking stack, cluster management, and application framework levels, as well as the impact of tail latency. ASPLOS’19.

Open Source 61

Open Source Hardware Benchmarking Systems 61

ACM Sigarch

OCTOBER 12, 2020

Are caches large enough for this code? Can we do something to optimize giant event loops running bytecode interpreters at the architecture level (perhaps by revisiting ideas from long ago)? There’s some work on hardware proposals for these systems, like Zhu et al., What about branch prediction tables?

C++ 109

C++ Benchmarking Hardware Architecture 109

SQL Server According to Bob

JANUARY 11, 2020

Time of Last Access The time of last access is a caching ​​ algorithm ​​ that enables ​​ cache ​​ entries to be ordered by their ​​ access times.

Servers 40

Servers Cache Database Media 40

Smashing Magazine

JANUARY 21, 2021

Plus a service worker that caches all static assets and serves them for repeat views, along with cached versions of articles that a reader has already visited. The reasons for it are numerous, but the most important one is a huge difference in network conditions and device hardware across the world. KB, Brotlified).

Performance 111

Performance Cache Mobile Network 111

Smashing Magazine

JANUARY 15, 2019

The vast majority of climate scientists attribute the increasing ferocity and frequency of extreme weather events around the world to climate change, which they largely attribute to human activity. how much data does the browser have to download to display your website) and resource usage of the hardware serving and receiving the website.

Website Performance 78

Website Performance Website Energy Performance 78

Smashing Magazine

JANUARY 11, 2021

Build Optimizations JavaScript modules, module/nomodule pattern, tree-shaking, code-splitting, scope-hoisting, Webpack, differential serving, web worker, WebAssembly, JavaScript bundles, React, SPA, partial hydration, import on interaction, 3rd-parties, cache. This knowledge will give you the best optimization target for ongoing efforts.

Performance 145

Performance Cache Media Metrics 145

Smashing Magazine

JANUARY 6, 2020

In the end, it’s not the load events or server response times that define the experience, but the perception of how snappy the interface feels. Custom metrics measure a particular, custom event for the user, e.g. Twitter’s Time To First Tweet and Pinterest’s PinnerWaitTime. What does it mean?

Performance 112

Performance Cache Servers Network 112

Smashing Magazine

JANUARY 7, 2019

Custom metrics measure a particular, custom event for the user, e.g. Twitter’s Time To First Tweet and Pinterest’s PinnerWaitTime. For that one, you can monitor Hero Rendering Times , or use Performance API , marking particular timestaps for events that are important for your business. Image credit: Addy Osmani ) ( Large preview ).

Performance 111

Performance Cache Network Metrics 111

High Scalability

NOVEMBER 25, 2019

Edge caching. In general, Egnyte connect architecture shards and caches data at different levels based on: Amount of data. Nginx for disk based caching. CFS(cloud file system), EOS (Egnyte object store), Content Security, Event Sync, Search Service, User behavior based recommendation service form major parts of the system.

Architecture 52

Architecture Cache Azure Storage 52