All Things Distributed

NOVEMBER 15, 2010

These trade-offs have even impacted the way the lowest level building blocks in our computer architectures have been designed. NVIDIAs CUDA SDK provides a higher level interface with extensions in the C language that supports both multi-threading and data parallelism. Â The input data is often organized as a Grid. Recent Entries.

AWS 125

AWS Programming Latency Architecture 125

Testlodge

AUGUST 9, 2023

When there are multiple options for a decision, each decision outcome should be exercised before moving on to the next decision. Finally, once all the decision outcomes on the baseline path have been covered, apply the same approach to all subsequent paths until all the decision outcomes in the specified code have been exercised.

Testing 75

Testing Software Software C++ 75

Sutter's Mill

MAY 1, 2023

Simple, mathematically safe, and efficient chained comparisons ( commit ) P0515 “Consistent comparison” (aka “spaceship”) was the first feature derived from this Cpp2 work to be adopted into the ISO Standard for C++, in C++20. Thank you again to everyone who helped land this Cpp2 feature in the ISO C++ Standard.

C++ 97

C++ Virtualization Lambda Code 97

Sutter's Mill

JANUARY 11, 2021

C++20 supports two main assertion facilities… For each one, briefly summarize how it works, when it is evaluated, and whether it is possible for the programmer to specify a message to be displayed if the assertion fails. 5] For conditions, it’s up to us to make sure it’s true.) Bonus: [[assert: ?

C++ 81

C++ Programming Code Testing 81

Percona

DECEMBER 5, 2023

The scenario Service considerations In this exercise, we wanted to perform a major version upgrade from PostgreSQL v12.16 p 5432 -S slot_logical_upgrade -R -c fast -Xs -P -D /data/PG12_new -C 32610/32610 kB (100%), 1/1 tablespace 8. to PostgreSQL v15.4. Create a REPLICATION SLOT Create a replication slot to capture changes.

Database 103

Database Traffic C++ Servers 103

Percona

AUGUST 30, 2023

This can be changed later using the pg_checksums utility, but that will be a painful exercise on a big database. psql "host=localhost user=postgres options='-c synchronous_commit=off'" psql (14.8) This is the level at which decisions on whether to use data_checksums need to be taken. Type "help" for help.

Database 120

Database Servers Open Source Tuning 120

O'Reilly

DECEMBER 12, 2023

This ruling in itself raises many questions: how much creativity is needed, and is that the same kind of creativity that an artist exercises with a paintbrush? However, that design issue isn’t germane to this discussion. If a human writes software to generate prompts that in turn generate an image, is that copyrightable?

Artificial Intelligence 133

Artificial Intelligence Google Media Processing 133

Sutter's Mill

MARCH 25, 2021

Some of these are exercised by the “wrong order” permutations above, but even call sites that remember the right argument order can make mistakes about the actual values. But is (b) always better than (c), in other examples? Consider using a class instead. is_reachable? What’s the cost?

C++ 62

C++ Design Code Systems 62

HammerDB

JULY 16, 2021

with the TPROC-C workload on a system with 2 sockets of Intel Xeon 8280L that means we have 28 cores per socket, with 56 physical CPUs and 112 logical CPUs with Hyper-Threading. Plotting these data points enables us to understand the scalability of the database software being tested on that system. and MySQL 8.0.25 and MySQL 8.0.25

Virtualization 58

Virtualization Performance C++ Database 58

The Morning Paper

DECEMBER 8, 2019

Byte-addressable non-volatile memory,) NVM will fundamentally change the way hardware interacts, the way operating systems are designed, and the way applications operate on data. The Twizzler KVS (key-value store) is just 250 lines of C code, and uses one persistent object for the index structure, and a second one for the data.

Hardware 56

Hardware Programming Media Storage 56

HammerDB

APRIL 19, 2023

Instead, focus on understanding what the workloads exercise to help us determine how to best use them to aid our performance assessment. sysbench is a widely used open-source benchmarking tool that is designed to evaluate the performance of CPU, memory, disk I/O, and database systems. and 8.0.32 HammerDB 4.5 to 8.0.32.

Performance 55

Performance Benchmarking Cache Storage 55

The Agile Manager

AUGUST 31, 2021

Although completing a story may require contribution from people in different roles - QA analyst and developer and experience designer, for example - each person is still responsible for the entire outcome of the story. An Agile story is an expression of end-to-end business need. Good managers know how to work the problem and solution space.

Metrics 52

Metrics Design Engineering C++ 52

ScaleOut Software

AUGUST 20, 2020

Real-time digital twins are designed to be easy to develop and modify. They make use of standard object-oriented concepts and languages (such as C#, Java, and JavaScript). This exercises the model’s code and surfaces issues and exceptions, which can be readily examined and resolved in a controlled environment.

Cloud 52

Cloud Development Analytics Azure 52

ScaleOut Software

AUGUST 20, 2020

Real-time digital twins are designed to be easy to develop and modify. They make use of standard object-oriented concepts and languages (such as C#, Java, and JavaScript). This exercises the model’s code and surfaces issues and exceptions, which can be readily examined and resolved in a controlled environment.

Cloud 52

Cloud Development Analytics Azure 52

HammerDB

JANUARY 5, 2019

That is why we run a workload designed exactly for this purpose as it gives us a “benchmark” 2. Benchmarks are nothing like your real applications, and that’s actually good thing because unlike your application a good benchmark application like HammerDB has been designed to scale. Scalability.

Benchmarking 40

Benchmarking Database Social Media Scalability 40

John McCalpin

JANUARY 22, 2018

The exercise seemed simple enough — just fix one item in the Colfax code and we should be finished. An illustrative example: The IBM POWER4 has 72 floating-point rename registers and two floating-point arithmetic units capable of executing fused multiply-add (FMA) instructions (a = b+c*d). Instead, we found puzzle after puzzle.

Latency 40

Latency Hardware Code Testing 40

John McCalpin

JANUARY 22, 2018

There was no deep goal — just a desire to see the maximum GFLOPS in action. The exercise seemed simple enough — just fix one item in the Colfax code and we should be finished. Instead, we found puzzle after puzzle. An illustrative example: . FMAs/cycle. .

Latency 40

Latency Hardware Code Testing 40