The Netflix TechBlog

APRIL 17, 2019

264/AVC, currently, the most ubiquitous video compression standard supported by modern devices, often in hardware. However, rav1e is written in Rust programming language, whereas an encoder written in C has a much broader base of potential developers. The success was repeated by H.264/AVC, Open-source video coding needs you!

Open Source 167

Open Source Scalability Speed Efficiency 167

Sutter's Mill

MAY 28, 2012

It’s time for, not one, but two brand-new, up-to-date talks on the state of the art of concurrency and parallelism in C++. I’m going to put them together especially and only for C++ and Beyond 2012 , and I’ll be giving them nowhere else this year: C++ Concurrency – 2012 State of the Art (and Standard). And there’s a lot to tell.

C++ 40

C++ Hardware Best Practices Tuning 40

Percona

AUGUST 29, 2023

Depending on the configuration, one can tune a hardware RAID for either performance or redundancy. Now let’s stretch our imagination and consider a second method of high availability, ala Citus. The best way to describe the Citus way of doing things is to reflect how data is managed by a disk RAID array. citus_columnar | 11.1-1

C++ 98

C++ Database Storage Testing 98

Sutter's Mill

APRIL 14, 2011

Scott Meyers, Andrei Alexandrescu and I are continuing to craft and announce the technical program for C++ and Beyond (C&B) 2011 , and two more sessions are now posted. All talks are brand-new material created specifically for C&B 2011. Here are short blurbs; follow the links for longer descriptions.

C++ 40

C++ Programming Strategy Code 40

The Morning Paper

JANUARY 28, 2020

" Running end-user compute inside the datastore is not without its challenges of course. Entry/exit in/out of V8 contexts is less expensive than hardware-based isolation mechanisms, keeping request processing latency low and throughput high. V8 is lightweight enough that it can easily support thousands of concurrent tenants.

Serverless 99

Serverless Storage Latency Cloud 99

Percona

JUNE 20, 2023

In order to understand “segmentation fault,” it is a must to know the basic idea of segmentation and its implementation in C programming. ” This is not unusual and doesn’t affect the course of the execution as it just loads desirable items in memory. Copyright (C) 2020 Free Software Foundation, Inc.

Programming 103

Programming C++ Database Virtualization 103

Smashing Magazine

NOVEMBER 16, 2021

DRM-free, of course. Touch Design for Mobile Interfaces presents and shares real information on hardware, people, interactions, and environments. DRM-free, of course. If you are in the C-suite, do yourself a favor and read. DRM-free, of course. Get Print + eBook. Quality hardcover. 100 days money-back-guarantee.

Mobile 106

Mobile Design Best Practices Website 106

ACM Sigarch

APRIL 8, 2019

Although at graduate-level, architecture classes cover interesting cutting-edge research, materials taught to undergrads in computer architecture courses, pedagogically are detached from cutting-edge research (eg. This is arguably a fundamentally hard problem for computer architecture, but efforts towards open source hardware (eg.

Architecture 74

Architecture Open Source Hardware Software Engineering 74

HammerDB

FEBRUARY 25, 2021

For HammerDB both TPROC-C and TPROC-H run all of their workloads on the database being tested in SQL. The following is an example from TPROC-C from SQL Server. TPROC-C however is derived from the TPC-C specification and requires application logic around the SQL. Database interfaces in C. select top 100.

Programming 68

Programming Benchmarking Virtualization C++ 68

Nick Desaulniers

APRIL 6, 2020

halt (); Some sort of very early exception handler; better to sit busy in an infinite loop than run off and destroy hardware or corrupt data, I suppose. Jann Horn gets back to me first: Can you use QEMU to look at the hardware frame (which contains values pushed by the hardware in response to the page fault) in early_idt_handler_common?

C++ 67

C++ Hardware Code Virtualization 67

The Morning Paper

DECEMBER 8, 2019

Byte-addressable non-volatile memory,) NVM will fundamentally change the way hardware interacts, the way operating systems are designed, and the way applications operate on data. Traditional pointers address a memory location (often virtual of course). At least, the nature of pointers that we want to make persistent.

Hardware 56

Hardware Programming Media Storage 56

Percona

MAY 1, 2023

Key areas include: Configuration parameter tuning : This tuning involves altering variables such as memory allocation, disk I/O settings, and concurrent connections based on specific hardware and requirements. This not only results in cost savings by minimizing hardware requirements but also has the potential to decrease cloud expenses.

Tuning 52

Tuning Database Efficiency Performance 52

Percona

DECEMBER 14, 2022

Of course, there’s always more that can be said. Installing the extension into your database is pretty much standard fare: -- create your extension in the database: create database db01; c db01 create extension citus_columnar; Here are two tables, of type HEAP and COLUMNAR, that will be used for the initial investigations. 561.522 ms.

Database 93

Database Storage Analytics Processing 93

Brendan Gregg

SEPTEMBER 5, 2017

Hit Ctrl-C to end. ^C C operation = 'read' usecs : count distribution 0 -> 1 : 0 | | 2 -> 3 : 0 | | 4 -> 7 : 4479 | *| 8 -> 15 : 1028 | | 16 -> 31 : 14 | | 32 -> 63 : 1 | | [.]. Many new tools can now be written, and the main toolkit we're working on is [bcc]. Tracing ZFS operation latency.

Virtualization 75

Virtualization AWS Engineering Hardware 75

The Morning Paper

DECEMBER 1, 2019

Plus ça change, plus c’est la même chose. That means of course that we have to have a way to recover the control plane structure after a crash, and we’ll be trading off slightly longer recovery times while we recreate it, for faster operation in the normal case. That’s my analogy, so blame me if it doesn’t work for you!).

Efficiency 60

Efficiency Cache C++ Performance 60

The Morning Paper

JANUARY 19, 2020

Humans can of course work in teams, with a structure resembling that of the system itself , so I’m not saying everything must fit in a single mind, but each of the pieces that need to be understood as a whole do need to. Take a trivial example with three components A, B, and C. Go overdrawn (i.e., How do participants do that?

C++ 50

C++ Systems Software Software 50

The Morning Paper

SEPTEMBER 12, 2019

SQL provides a declarative programming interface, below which the system itself can figure out the most effective execution plans based on data size and statistics, layout, compute hardware etc. The implementations require both SQL and also some UDFs written in C++. Be careful what you ask for (materialize).

Network 44

Network Database Programming Hardware 44

Highly Scalable

SEPTEMBER 18, 2012

A database should accommodate itself to different data distributions, cluster topologies and hardware configurations. C) In the previous schema, failures can be handled better using the hinted handoff technique [8]. Network partitions of course can lead to violation of this guarantee. (G, Data Placement.

Database 213

Database Latency C++ Scalability 213

The Morning Paper

MAY 12, 2019

An open-source benchmark suite for microservices and their hardware-software implications for cloud & edge systems Gan et al., The paper examines the implications of microservices at the hardware, OS and networking stack, cluster management, and application framework levels, as well as the impact of tail latency. ASPLOS’19.

Open Source 61

Open Source Hardware Benchmarking Systems 61

Smashing Magazine

AUGUST 22, 2021

This method is often called 0-RTT (although, of course, it still takes one round trip for the HTTP response data to start arriving). For example, for streams A, B, and C, we might see a packet sequence of ABCABCABCABCABCABCABCABC , where we change the active stream in each packet (let’s call this round-robin). As for TLS 1.3,

Performance 109

Performance Network Latency Servers 109

Testsigma

FEBRUARY 3, 2021

Mobiles have different models, screen resolutions, operating systems, network types, hardware configurations, etc. Also, how to test the hardware of the mobile phone itself, is it supporting all the software as it should? Let us have a look at the most popular types of mobile testing for applications and hardware.

Mobile 82

Mobile Testing Hardware C++ 82

Sutter's Mill

APRIL 6, 2011

We know that getting full computational performance out of most machines—nearly all desktops and laptops, most game consoles, and the newest smartphones—already means harnessing local parallel hardware, mainly in the form of multicore CPU processing. This is the commoditization of the supercomputer.

Development 40

Development Hardware C++ Games 40

Alex Russell

JUNE 20, 2020

3] Oh, and it should be imperatively programmed with Lisp-in-C's-clothing. In each quantum of time, hardware and OS vendors press ahead, adding features. As OS and hardware deployed base integrate these components, the set of what most computers can do is expanded. high-color image raster. Same with IDEs and developer tools.

Games 64

Games Hardware Java Mobile 64

All Things Distributed

MARCH 13, 2017

Previously, the top priorities for IT departments were equipping data centers with hardware, purchasing software, and further developing proprietary software. That might be a course, the opportunity to lead a project, or gaining new insights by working in another part of the company.

Social Media 71

Social Media Retail Automotive Innovation 71

Adrian Cockcroft

JUNE 21, 2022

I became the Sun UK local specialist in performance and hardware, and as Sun transitioned from a desktop workstation company to sell high end multiprocessor servers I was helping customers find and fix scalability problems. We had specializations in hardware, operating systems, databases, graphics, etc. that a lot of people used.

Tuning 52

Tuning Benchmarking Engineering C++ 52

Smashing Magazine

JANUARY 6, 2020

This might be very different for your company, of course, but that’s a close enough approximation of a majority of customers out there. On the other hand, we have hardware constraints on memory and CPU due to JavaScript parsing times (we’ll talk about them in detail later). Both of them are great introductions for diving into Webpack.

Performance 112

Performance Cache Servers Network 112

Smashing Magazine

JANUARY 11, 2021

This might be very different for your company, of course, but that’s a close enough approximation of a majority of customers out there. On the other hand, we have hardware constraints on memory and CPU due to JavaScript parsing and execution times (we’ll talk about them in detail later).

Performance 145

Performance Cache Media Metrics 145

Smashing Magazine

JANUARY 7, 2019

On the other hand, we have hardware constraints on memory and CPU due to JavaScript parsing times (we’ll talk about them in detail later). Of course, your data might show that your customers are not on these devices, but perhaps they simply don’t show up in your analytics because your service is inaccessible to them due to slow performance.

Performance 111

Performance Cache Network Metrics 111

HammerDB

DECEMBER 10, 2024

More than ever, we see confusion in interpreting and comparing the performance of databases with workloads derived from the TPC-Council’s TPC-C specification, including HammerDB’s TPROC-C NOPM and TPM. Importantly, TPC-C and tpmC are registered trademarks of the TPC-Council.

C++ 58

C++ Benchmarking Hardware Performance 58