ACM Sigarch

APRIL 2, 2025

Figure 1: Comparison of widest CPUs in 2015 and 2025. RISC-V is often considered a definitive RISC instruction set, as it was carefully designed to avoid past pitfalls, such as reliance on specific hardware characteristics (e.g., delay slots), which have limited the scalability of previous architectures.

Efficiency 54

Efficiency Hardware Architecture Design 54

Brendan Gregg

MARCH 16, 2024

Only in extreme circumstances does the cost (in processor time and I-cache footprint) translate to a tangible benefit - circumstances which usually resort to hand-coded assembly anyway. It shouldn't be 10%, unless it's cache effects. And for leaf routines (which never establish a frame), this is a non-issue.

Java 137

Java Cache Google Hardware 137

Percona

JANUARY 17, 2019

On multi-core machines – which is the majority of the hardware nowadays – and in the cloud, we have multiple cores available for use. Aurora Parallel Query response time (for queries which can not use indexes) can be 5x-10x better compared to the non-parallel fully cached operations. The second and third run used the cached data.

Cache 72

Cache C++ AWS Airlines 72

Brendan Gregg

FEBRUARY 28, 2023

Make sure your system can handle next-generation DRAM,” [link] Nov 2011 - [Hruska 12] Joel Hruska, “The future of CPU scaling: Exploring options on the cutting edge,” [link] Feb 2012 - [Gregg 13] Brendan Gregg, “Blazing Performance with Flame Graphs,” [link] 2013 - [Shimpi 13] Anand Lal Shimpi, “Seagate to Ship 5TB HDD in 2014 using Shingled Magnetic (..)

Performance 103

Performance Latency Cache Virtualization 103

Alex Russell

MARCH 6, 2021

A then-representative $200USD device had 4-8 slow (in-order, low-cache) cores, ~2GiB of RAM, and relatively slow MLC NAND flash storage. Hardware Past As Performance Prologue. Regardless, the overall story for hardware progress remains grim, particularly when we recall how long device replacement cycles are: Tap for a larger version.

Performance 127

Performance Network Mobile Metrics 127

Randon ASCII

FEBRUARY 25, 2018

In this particular investigation, which spanned twenty months, we suspected hardware failure, compiler bugs, linker bugs, and other possibilities. Jumping too quickly to blaming hardware or build tools is a classic mistake, but in this case the mistake was that we weren’t thinking big enough. Russian translation is here.

Programming 79

Programming Hardware Cache Code 79

SQL Performance

JULY 16, 2019

A close monitoring of the hardware enthusiast community, including many of the most respected hardware analysts and reviewers paints an even more dire picture about Intel in the server processor space. This made it easier for database professionals to make the case for a hardware upgrade, and made the typical upgrade more worthwhile.

Servers 46

Servers Hardware Architecture Retail 46