John McCalpin

FEBRUARY 17, 2025

“Latency” is the duration from the execution of a load instruction (to an address that misses in all the caches), and the completion of that load instruction when the data is returned from memory. The example below is for a 2005-era processor with 60 ns memory latency and 6.4 cache lines -> 5.6

Latency 71

Latency Hardware Cache Systems 71

Dynatrace

DECEMBER 22, 2021

Metrics are measures of critical system values, such as CPU utilization or average write latency to persistent storage. For example, in 2005, Dynatrace introduced a distributed tracing tool that allowed developers to implement local tracing and debugging. Observability is made up of three key pillars: metrics, logs, and traces.

Artificial Intelligence 245

Artificial Intelligence Metrics Architecture DevOps 245

John McCalpin

FEBRUARY 17, 2025

“Latency” is the duration from the execution of a load instruction (to an address that misses in all the caches), and the completion of that load instruction when the data is returned from memory. The example below is for a 2005-era processor with 60 ns memory latency and 6.4 cache lines -> 5.6

Latency 40

Latency Hardware Cache Systems 40

Brendan Gregg

AUGUST 8, 2017

The oldest change in the entire Linux repo dates back to 2005, when Linus imported Linux 2.6.12-rc2, Some people have found values that seem to work for their systems and workloads: they know that when load goes over X, application latency is high and customers start complaining. Latency was acceptable and no one complained.

Latency 111

Latency Metrics C++ Systems 111

SQL Performance

FEBRUARY 22, 2021

The system table sys.sysprocesses was replaced way back in SQL Server 2005 by a set of dynamic management views (DMVs), most notably sys.dm_exec_requests , sys.dm_exec_sessions , and sys.dm_exec_connections. Recently one of our teams was investigating a log reader latency issue.

Latency 57

Latency Servers Monitoring Systems 57

John McCalpin

APRIL 2, 2020

The presentation discusses a family of simple performance models that I developed over the last 20 years — originally in support of processor and system design at SGI (1996-1999), IBM (1999-2005), and AMD (2006-2008), but more recently in support of system procurements at The Texas Advanced Computing Center (TACC) (2009-present).

Benchmarking 59

Benchmarking Performance Latency Architecture 59

John McCalpin

APRIL 2, 2020

The presentation discusses a family of simple performance models that I developed over the last 20 years — originally in support of processor and system design at SGI (1996-1999), IBM (1999-2005), and AMD (2006-2008), but more recently in support of system procurements at The Texas Advanced Computing Center (TACC) (2009-present).

Benchmarking 40

Benchmarking Performance Latency Architecture 40