John McCalpin

FEBRUARY 17, 2025

Sustainable memory bandwidth using multi-threaded code has closely followed the peak DRAM bandwidth, typically delivering best case throughput of 75%-85% of the peak DRAM bandwidth in each generation. The example below is for a 2005-era processor with 60 ns memory latency and 6.4 cache lines -> 5.6 cache lines -> 5.6

Latency 71

Latency Hardware Cache Systems 71

Dynatrace

DECEMBER 22, 2021

Metrics are measures of critical system values, such as CPU utilization or average write latency to persistent storage. For example, in 2005, Dynatrace introduced a distributed tracing tool that allowed developers to implement local tracing and debugging. Observability is made up of three key pillars: metrics, logs, and traces.

Artificial Intelligence 245

Artificial Intelligence Metrics Architecture DevOps 245

John McCalpin

FEBRUARY 17, 2025

Sustainable memory bandwidth using multi-threaded code has closely followed the peak DRAM bandwidth, typically delivering best case throughput of 75%-85% of the peak DRAM bandwidth in each generation. The example below is for a 2005-era processor with 60 ns memory latency and 6.4 cache lines -> 5.6 cache lines -> 5.6

Latency 40

Latency Hardware Cache Systems 40

Brendan Gregg

AUGUST 8, 2017

Nowadays, the source code to old operating systems can also be found online. Linux is also hard coding the 1, 5, and 15 minute constants. This state is used by code paths that want to avoid interruptions by signals, which includes tasks blocked on disk I/O and some locks. This, too, was a dead end. This, too, was a dead end.

Latency 111

Latency Metrics C++ Systems 111

John McCalpin

APRIL 2, 2020

The presentation discusses a family of simple performance models that I developed over the last 20 years — originally in support of processor and system design at SGI (1996-1999), IBM (1999-2005), and AMD (2006-2008), but more recently in support of system procurements at The Texas Advanced Computing Center (TACC) (2009-present).

Benchmarking 59

Benchmarking Performance Latency Architecture 59

John McCalpin

APRIL 2, 2020

The presentation discusses a family of simple performance models that I developed over the last 20 years — originally in support of processor and system design at SGI (1996-1999), IBM (1999-2005), and AMD (2006-2008), but more recently in support of system procurements at The Texas Advanced Computing Center (TACC) (2009-present).

Benchmarking 40

Benchmarking Performance Latency Architecture 40

IO River

NOVEMBER 2, 2023

This means that if you wish to switch CDN, you’d have to rewrite a vast amount of code to support a new API.‍‍Sign For example, Akamai introduced ASI in 2005, which became the standard for building new websites. Therefore, if you wish to migrate across different CDNs, you’ll have to rewrite the IaC code almost entirely.Â

Lambda 52

Lambda AWS Cache Website 52